Designing with the Spartan-6

Please click on the PDF below for a full course summary  

Are you interested in learning how to effectively utilize Spartan®-6 FPGA architectural resources? This course supports both experienced and less experienced FPGA designers who have already completed the Essentials of FPGA Design course. This course focuses on understanding as well as how to properly design for the primary resources found in these popular device families.

Topics covered include device overviews, CLB construction, DCM and PLL clocking resources, global and I/O clocking techniques, memory, DSP, and source-synchronous resources. Memory controller support and the dedicated hardware resources available in each of the subfamilies are discussed.

This course also includes a detailed discussion about proper HDL coding techniques that enables designers to avoid common mistakes and get the most out of their FPGA. A combination of modules and labs allow for practical hands-on application of the principles taught.

Please confirm course schedule dates before purchase as courses will not run until minimum numbers are achieved. Courses can be scheduled as required at short notice, often for very small numbers so please call to have a course set up for you.