Introduction to the AccelDSP Synthesis Tool

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Learn how to synthesize an algorithm written in the language of the MATLAB® software into a design that is optimized for a Xilinx FPGA. Find out how to make coding changes in the MATLAB software that improve area and performance. Use the floating-point to fixed-point and design exploration features of the AccelDSP™ synthesis tool to achieve maximum results. Merge a synthesized MATLAB software block into a larger HDL design or System Generator design.

After completing this comprehensive training, you will have the necessary skills to:

• Transform a non-synthesizable MATLAB software algorithm into a design that can be synthesized by the AccelDSP synthesis tool
• Identify the concepts of quantization as well as specify, monitor, and control bit growth in a MATLAB software design
• Use AccelDSP synthesis tool directives and coding style changes to optimize a design for performance and efficiency
  
• Integrate an AccelDSP synthesis tool-generated design into a larger HDL design
• Generate and merge an AccelDSP synthesis tool design into a larger System Generator design