Please click on the PDF below for a full course summary
Increase your VHDL proficiency by learning advanced techniques that will help you write more robust and reusable code. This comprehensive course is targeted toward designers who already have some experience with VHDL.
The course highlights modeling, testbenches, RTL/synthesizable design, and techniques aimed at creating parameterizable and reusable designs. The majority of class time is spent in challenging hands-on labs as compared to lecture modules.
Please confirm course schedule dates before purchase as courses will not run until minimum numbers are achieved. Courses
can be scheduled as required at short notice, often for very small
numbers so please call to have a course set up for you.